The ChipIN Conclave, organized under C-DAC’s ChipIN Programme, was held on 09–10 December 2025 as a two-day event aimed at strengthening India’s semiconductor design ecosystem by fostering collaboration among startups, EDA vendors, foundries, academia, investors, and government stakeholders. The event featured an inaugural session with senior leadership from C-DAC and industry experts, followed by the felicitation of 22 TEC members for their contributions.

Key thematic tracks included EDA Connect, highlighting design and verification challenges and startup enablement; ECCO System Builders, focusing on funding trends and system-level innovation; and Foundry Connect, which addressed foundry access, PDK enablement, design services, and the role of open-source EDA. The conclave concluded with a closing address by the Additional Secretary, underscoring ecosystem-driven growth and the announcement of a Letter of Intent between C-DAC and Synopsys. Overall, the event hosted 9 speakers, 76 participants, and 69 exhibitors, reinforcing momentum toward a robust and collaborative semiconductor ecosystem in India.